Each year Cymer gives a talk providing an update on progress on their EUV source, and this year David Brandt’s talk was on Tuesday morning. I have never been so shocked and disappointed at an SPIE presentation in my entire career. It was a mass of inaccuracies surrounded by obfuscation and wrapped in misleading statements. I am not as adept at penetrating the techno-marketing fog as the EUV customers are (who were collectively groaning during Brandt’s talk), but let me try my best to translate a few of the statements made into plain English.

The TSMC MOPA source going down was planned. This directly contradicts what Jack Chen of TSMC said yesterday, so I don’t know how to translate this one.
Multiple MOPA sources have been installed at customer locations. Installed does not mean actual wafers have been exposed.
70W has been demonstrated. Under unstated laboratory conditions, 70W was demonstrated for 6 minutes (one graph had an x-axis with the source operating time in seconds!)
A MOPA source printed five wafers at 99.9% yield. No actual wafers were harmed in this experiment. A source was run on a lab bench and its output measured. Then, using a software algorithm, the pulses were grouped into the assumed number of pulses each die would receive, and if no pulse in that group deviated in power more than the spec allowed, that die was said to yield.
A graph shows 6 hours of controlled-loop operation of a MOPA source, but without numbers on the “power output” y-axis. This graph says nothing.
We are committed to 70 wph by the end of 2014. Using ASML’s standard calculations 70 wafers per hour translates into about 100W at the intermediate focus. Thus, this statement is essentially 100W by the end of the year, similar to what Brandt said last year and the year before. While the conditions of delivering 100W remains unstated, what it certainly does not mean is the use of a 100W source integrated onto an NXE:3300 scanner at a customer site to print wafers by the end of the year.

The statement that ASML is committed is undoubtedly true. Many, many smart, hardworking, and dedicated scientists, engineers, and staff at Cymer and ASML are doing all they can to make EUV a success. David Brandt’s talk did each of these worthy folk a great disservice.

But on to the rest of the conference. I greatly enjoyed the two sessions dedicated to “SEM Simulation and Emulation”. We have had the theoretical understanding and the tools to do a much better job of extracting information from an SEM image for a long time. It is great to see a larger effort by our community to actually making that happen. I think it is possible to look at a top-down SEM image of a set of features and extract quantitatively useful information about the line-edge roughness. Maybe one day soon we will actually do this.

My favorite talk of the conference so far was given by Ricardo Ruiz of HGST entitled “Directed self-assembly: Where does the roughness come from?” It was a model of how good data and good theoretical and mathematical understanding can be combined using clear thinking to make a difficult topic not just understandable, but easily so. (Full discloser: I visited Ricardo four weeks ago and he gave me an extended version of this talk, so the mass of data he showed was probably easier for me to grasp than most). We should all strive for such a result in our presentations.

The number of directed self-assembly (DSA) talks this year is way up (I think more than double the number from last year). Progress seems to have been remarkably fast, even though the industry has not yet converged on the one or few best options for first implementation. I’m looking forward to even more DSA talks tomorrow.

The day ended for me with Will Conley and Kafai Lai’s panel on “The Battle for the 7nm Node”. Generally, evening panel discussions are a disappointing experience. Panelist break the slide count rules and try to pack an entire talk into their allotted 5 minutes, producing a mass of uncoordinated statements that make audience participation and panelist discussions nearly impossible. Not this time. The theme was fun (a jury trial, accusing each of the technical options for 7nm node lithography of being exceptionally unpleasant, which of course they are), the panelists were highly entertaining (at 9pm, it is better to be funny than data dense), and I may even have learned a thing or two. All were good. Chris Bencher rocks.