Of course, to speak without fully considering the implications of what is said is a part of the human condition. One of my favorite phrase-types in this genre is “God Bless ____”, where the blank can be “America”, “Our Troops”, or just about anything. I’m sure the primary sentiment is one of support for the putative object of blessing, but it doesn’t take much reflection to realize there is more to it than that. “God Bless America” is really the first half of a full thought, with the unstated second half being “but not other countries”. I’ve never heard anyone say “God bless the world”, and I’m not sure what the point of a blessing would be if not to confer some benefit not available to the unblessed. Personally, I don’t want God to bless Americans to the exclusion of non-Americans, but I suppose there are many people in my country who do.

“God Bless Our Troops” is even more problematic, since its purpose is undoubtedly to ask God to take sides in a current or future armed conflict. A God that was willing to take our side in most of the wars that America has fought (thus ignoring the equally fervent prayers of the other side) is too petty for my liking.

Which brings me to a recent encounter with bumper sticker philosophy. The other day, driving the roads of Austin, Texas, I saw the following bumper sticker, which takes this archetype to a new level:



Apparently, not only do our military personnel deserve blessings to the exclusion of other country’s militaries, but within our own armed forces we should expect those trained to be snipers to get extra blessings. And what blessing should a sniper receive? To become a better shot?

I’m not sure that this bumper sticker’s owner has fully thought through all of the implications of the slogan on display. My fear is that he has.

While I was at the SPIE Advanced Lithography Symposium 2012 in February, SPIE videotaped a short interview for their SPIE.tv site. Here is a link, where I ramble on about Next Generation Lithography.

http://spie.org/x86784.xml

This morning my daughter's first grade class had a "poetry cafe", with parents invited to listen to kids read their original poems. Here is one of the two poems that my six-year-old Sarah wrote and read:

The Dance Recital

The grass dances gracefully
to the beautiful music
of the wind.
And the Blue Bonnets
in their beautiful dresses
dance for the dirt
with nothing in it.

I can say with some certainty that she doesn't get her artistic talents from me. She is already a better poet.

Last night, my four-year-old daughter Anna asked me this question: "What's the number right before infinity?" Somebody (not me) had told her about infinity, and she has obviously been thinking about it. How would you answer that question? I thought about it and decided to just answer correctly: the number right before infinity is infinity. She did not like that answer one bit (and I can't blame her). Her number sense comes almost completely from the number line (counting), and so she wanted to know where infinity was in the counting sequence. Makes sense, right? Some of the answers to her other questions were easier for her to digest ("what's infinity plus infinity?"). In the end, though, she formulated an equation that made us both happy: Dad equals math.

I have many titles. Gentleman scientist. Consultant. Husband. Dad. Some are self-applied (the advantage of being my own boss), and some are earned. One that I am proud of, and take seriously, is the title of “writer”. Writing well is not easy, and I have the somewhat old-fashioned idea that I should only write if I have something worthwhile to say. So when I do write something, be it a blog post or a textbook, I take some pride in it.

But what if, in today’s world of high performance computing and Jeopardy-winning algorithms, a computer could be taught to do what I am doing now – to write? Simpler than the full-blown Turing Test, a writing computer certainly seems possible. But could a computer catch my interest? Inform me and intrigue me? Keep me reading? What might the result be like?

Based on empirical evidence, I know the answer.

Crap.

Computers can’t write worth crap.

Granted, this is my opinion, and I suspect that Dr. Philip M. Parker would disagree.

Professor Parker is an economist who describes himself as a pioneer in “automated authoring processes”. His work on computer authoring has resulted in one patent (US Patent #7,266,767, Method and apparatus for automated authoring and marketing) and over 200,000 book titles (more than 100,000 of which are available on Amazon). He says he has authored hundreds of thousands of poems using graph theory (I don’t even want to know what that means). Many of his titles use the “Webster” name to give it an imprint of authority, though the Webster name is in the public domain and in fact means nothing.

The basic idea is simple: create an application-specific template, fill it in with web-searched data, then apply some automated copy-editing rules. Combine this with print-on-demand, and viola. A hundred thousand books on Amazon (a large portion of which, I suspect, have never been read by a human).

I ran across this interesting and bizarre idea while searching on Amazon recently and coming across a title that intrigued me: Microlithography: Webster’s Timeline History, 1975-2007. The title sounded great, but the author was unfamiliar to me. What could it be? Since I have a lithography timeline of sorts on my website (http://www.lithoguru.com/scientist/lithohistory.html), I wanted to know. It cost me $28.95 to find out, and I am now on a mission to make sure that no one else will have to waste their time and money the way I did.

I’m not sure what I thought a “Timeline History” was, but in Dr. Parker’s automated hands it is simply an ordered list of publications containing the keyword (Microlithography, in this case). And not a very good list, either. The formatting varies from entry to entry, with each item largely unidentified (Is it a book? A journal article? A Master’s Thesis? A conference proceedings?) and often with insufficient information to actually find the item without Google’s help. To get a feeling for what is there, here are some stats.

The book has 347 entries, of which 22 are duplicates. The majority of the unique entries are patents (325, 70%), most of which include abstracts but none of which include patent numbers. Without these entries, the book would only be a few pages long. The rest are books, journals and conference proceedings (67, 20%), technical reports found on webpages (15, 5%), MS and PhD theses (10, 3%), individual peer-reviewed articles (5, 1.5%), and an encyclopedia entry (1, 0.3%).

What am I to make of these numbers? Are there really only 5 peer-reviewed articles on microlithography between 1975 and 2007? Only 10 MS and PhD theses? I have in my office far more than 67 books, conference proceedings and journals on microlithography. And what about the patents?

While patents make up the majority of the entries, 325 is closer to the number of microlithography patents issued in a few months, rather than over a 32 year period. A quick search of patents issued between 1975 and 2007 (using Google Patents) with the keyword “microlithography” turned up 7,300 patents. There are 2,860 patents with microlithography in the title. If you add “photolithography” to the keyword search, there are 29,900 hits, rising to 33,100 when “optical lithography” is added to the keywords. I’m not sure what value the 325 patents (less than 1% of the total) contained in this little book might provide a reader.

The bottom line is this: Microlithography: Webster’s Timeline History is a waste of time, a waste of money, and a waste of print-on-demand paper. I suspect that the full range of Philip M. Parker's computer-generated books have equal value.

But hey, I got a blog post out of it. And it was entirely human-written.

Moore’s Law has always been about economics: if we follow the trend of Moore’s Law, we can reduce the cost per function for our integrated circuits, making chips more powerful for the same cost, or making chips of a given capability cheaper. Historically, cost per function has decreased by about 29% per year, corresponding to a factor of 2 decrease in cost every two years. There are signs that this historic cost reduction trend will slow down. How much of a slowdown can our industry tolerate? If the cost per function is expected to decrease by less than 10% per year going forward, it is unlikely that chipmakers will be willing to invest the massive amounts required for a new generation of fabs. I suspect that the minimum cost per function decrease we can live with is about 15% per year.

What does this say about lithography costs and capabilities per technology node? The cost/function of a chip is the ratio of the cost/area of finished silicon from making the chip and the functions/area that the technology node can deliver. Over the last decade we have been on a 2-year technology shrink schedule, so that the functions/area double every two years. Thus, by keeping the cost/area constant, we have been able to reduce cost/function by 29% per year. If we stay on the same 2-year shrink cycle, a minimum allowed 15% cost/function decrease per year would allow a maximum of 20% increase in the cost/area of silicon each year. Alternately, if we keep the cost/area of silicon constant, we could slow down the 2-year technology node shrink cycle to 4 years between technology nodes, and still get the required 15% reduction in cost/function per year.

Of course, everyone in the semiconductor industry would love to stay on our historic trends: constant cost/area of finished silicon, and a two year cycle of doubling the functions/area. It seems unlikely that this trend can be maintained during the current decade, however. Thus, using a minimum allowed cost/function decrease of 15%/year as a target, we can either allow chipmaking costs/area to increase by 20% each year and stay on the 2-year technology node cycle, or we can allow our technology node cycle to slow to every four years while keeping manufacturing costs/area constant. Either option will allow for continued success, and probably a bit of growth, for the semiconductor industry. But if the technology shrinks come too slowly, or costs rise too quickly, the days of Moore’s Law will be numbered.

Today is pi day (3/14 – get it?), the not-exactly-official day to celebrate the mysteries of a circle’s circumference over its diameter. When this most famous numerical expression of irrationality is closely combined with the second most famous irrational number –Euler’s constant, e - the result is a common mode of celebration today: eating pie. Enthusiasts pride themselves on memorizing pi’s non-repeating digits out to 100 places, or they put the first one million digits on their webpage. Algorithms for calculating pi abound (my favorite requires a random number generator), with new ones regularly revealed.

But to use pi in a calculation (which anyone who performs scientific or engineering calculations almost certainly will do), one must necessarily approximate by truncating pi to a certain number of digits. One of the earliest truncations leads to just one digit: the Bible equates pi with 3 in two verses.

1 Kings 7:23, New International Version: “He made the Sea of cast metal, circular in shape, measuring ten cubits from rim to rim and five cubits high. It took a line of thirty cubits to measure around it.” (2 Chronicles 4:2 says essentially the same thing.)

If you want to estimate pi to more than one digit, you must look to sources more authoritative than the Bible.

Modern politicians can be expected to do a bit better than a 2500-year-old religious text, but not by much. In 1897, Taylor I. Record introduced a bill into the Indiana state legislature, written by physician and amateur mathematician Edwin J. Goodwin, which defined pi to be 3.2 (not even an accurate rounding). The bill allowed Indiana schools to use Goodwin’s copyrighted proof of the squaring of the circle for free – schools from other states would have to pay a royalty. The resulting House Bill 246 passed unanimously, 67 to 0. Fortunately, the chair of Purdue University’s mathematics department, Professor Clarence Waldo, fought bravely against this injustice against enlightened thinking and empirical observation. By lobbying the state Senate, Waldo convinced the Senators to table the bill indefinitely. (For the complete story, see here.)

Alas, we still have too few scientists and engineers and mathematicians in elected office. And while redefining pi is unlikely to come up again in legislation, there are still too many attempts to legislate the results of science, from evolution to climate change. We will always need more Clarence Waldo’s preaching reason, and more legislators who will listen to them.

As expected, the first EUV session of the last day of the conference filled a large room. It was time to hear the status of EUV tool development, in particular the EUV sources. ASML started things off with a rosy recounting of the successes of 2011. After installing their sixth NXE:3100 preproduction tool, ASML bragged of the 5300 EUV wafers processed at customer sites by these six tools in 2011. I couldn’t help remembering the ASML press release from last month saying a single 193i tool processed 4000 wafers in a day. That, in a nutshell, is the gap between preproduction and high volume manufacturing. They have a long way to go.

The EUV source status reports made future progress to higher power sound inevitable. Today, customers have sources with 9W of power at the intermediate focal plane, a 20W upgrade is being qualified, 50W has been demonstrated, and getting to 100W by the end of the year is straightforward. What could be easier? Somehow, I remain skeptical. Maybe it is because neither source presentation mentioned the damage caused by tin debris – the 5kV shorts or the frequent replacements of $1M collector mirrors – which can only get worse as source power goes up. Maybe it is because the roadmaps made the optimistic assumption that doubling the input laser power would double the EUV source output. Maybe it is because every past source milestone has been missed and it seems likely that future progress will be harder than past progress. Maybe it is because nature does not like EUV.

Or maybe I am biased. I wish the source vendors luck in reaching their goals. They are under a lot of pressure. In contrast, there was frequent mention of significant progress in EUV photoresists. A demonstration of 16 nm lines and spaces looked promising, though the dose was 33 mJ/cm2 (most people are hoping for 20 mJ/cm2 eventually) and the LWR was 3.7 nm, 23% of the nominal CD. This is progress certainly, but I find it very hard to believe that both dose and LWR will be appreciably reduced by next year.

I enjoyed the session on roll-to-roll printing, especially the Rolith presentation on a cylindrical phase-shifting mask with a UV lamp inside. This world of super-high volume patterning on continuous rolls of low-cost substrates is so different from what I think of as lithography that I could do nothing but look on in amazement.

The day ended for me with the last optical lithography session, where Nikon and ASML presented the current status of the latest 193-nm scanners. While single-patterning resolution remains fixed, the rest of the tool is getting better: CD uniformity, overlay and throughput. Under ideal conditions, CD uniformity can be less than 1 nm, single machine overlay can be less than 2 nm, and throughput can be over 220 wafers per hour (with a roadmap to >270 wph). These tools are becoming optimized for double patterning.

My favorite quote of the day: “Math works.” – John Biafore, commenting on a presentation showing a successful simulation prediction.

My least favorite quote: Cymer, talking about their improved internal EUV source testing facilities, said they will “hopefully learn faster than [the chip companies] do.”

And so another SPIE Advanced Lithography symposium is over. Till next year.

I continue to focus on line-edge roughness in my own research. This means that I attended papers in every conference in the symposium, since LER is an issue that cuts across all topics in lithography. (To be truthful, I meant to go to a paper in the new etch conference that talked about LER, but never made it.) LER is finally, in my opinion, getting the attention it deserves. I believe, and say to anyone who will listen, that LER is the ultimate limiter of resolution in optical lithography (e-beam as well). In fact, that was the title of my talk on Wednesday. I think that LER is a core component of Tennant’s Law, that it is killing EUV (in the same way that EUV source power is killing EUV), and that it will limit how far 193-nm lithography can be pushed. And the many difficulties of LER is one reason that directed self-assembly (DSA) so attractive.

Wednesday began for me with another tour-de-force paper by Chris Bencher and coauthors (Applied Materials and IBM) on continued progress on defectivity for DSA. Their work showed that defect inspection and review tools were capable of enabling progress for DSA, and that defect levels, while not zero, are low enough to do serious work on finding and eliminating the defects that are there. This is good news. Many people are scared that DSA defects are somehow thermodynamically inevitable, or that the statistics of DSA defectivity scale in some ugly way. That doesn’t look to be the case. Among other things, Bencher inspected 550 million contact holes on a DSA wafer and found 22 were missing (one of the fears of DSA, as well as for most lithography schemes, is missing contacts). This is a rate that makes finding defects hard, but getting to sufficiently low defect rates probable.

The next step is to get semiconductor-grade block-copolymer materials into the fabs for testing on real processes. And that is starting to happen. Yuriko Seino of Toshiba showed some amazing results of a DSA contact hole shrink process that looked almost ready to be used in manufacturing. Contact holes were printed in a guide material of spin-on carbon (CD = 72 +/- 8 nm, LER = 3.9 nm) on 300-mm wafers. A PMMA-Polystyrene block copolymer was spun on, filling the holes with the self-assemblying polymer (a ring of polystyrene forms along the outside of the contact, with PMMA in the middle). A DUV flood exposure made the PMMA soluble in an organic developer. After development, the DSA holes had a CD of 28.5 +/- 1.4 nm, with an LER (or CER, contact edge roughness) of 0.7 nm. Amazing results – but this is what DSA does. Still to come are electrical via chain yield tests – an essential test of the overall process capability.

An interesting problem that must be tackled before DSA can be used in manufacturing is the impact of this process on design. In the contact hole shrink process (the most likely place DSA will first appear in manufacturing fabs), arbitrary contact holes on arbitrary grids are not possible. Instead, DSA will assembly to produce a specific contact hole size, and will be in the right spot only if those holes are on a proper grid. Both of these issues will significantly impact chip layout. Which is why I was excited to see a paper from Stanford on DSA-aware layout for random logic. With the right design approach, the limited range of contact hole features that can be printed with DSA can be a big advantage.

Unfortunately, on Wednesday I had to reprise my role as self-appointed ethics policeman for papers. A company (that should have known better) gave a paper presenting a new model they had developed. They kept all aspects of how the model worked secret, revealing not even the least detail (for competitive reasons, no doubt). Further, the model was not commercially available – it was for internal use only. As a result, after listening for 20 minutes I could come away from that talk with absolutely nothing. The minimum (and foundational) ethical principle of scientific publication is that sufficient detail be given so that others can reproduce the work. Otherwise, the paper is not a scientific one – it cannot be used to build our shared body of knowledge. I used the question period at the end of the presentation to explain this basic principle to the author.

After another poster session and several beers at KLA-Tencor’s PROLITH party, the third day of Advanced Lithography came to an end. Tomorrow morning will bring the EUV tool and source status review papers. I predict a full house at that session.

There is no place I’d rather be on Valentine’s Day than in San Jose surrounded by my friends and colleagues in lithography. No wait, I didn’t mean that. I miss my wife and two young daughters. I don’t like traveling without them.

While Valentine’s Day is the Hallmark holiday I despise the most, it does serve to remind me of the conflicted feelings of most business travelers who have families. Over the years I have missed holidays and birthdays and uncountable little things in the lives of the people I love most. I have also been to interesting and exotic places, met great people (many of whom have become lifelong friends), and worked on fun and intellectually satisfying projects. Mostly, I’ve been able to keep these things in balance during the various phases of my life, and for that I am grateful. While popular culture celebrates those who live their lives in the extreme, the wise know that happiness and success is about balance.

But there is no balance this week. This week is non-stop, metal to the floor, take no prisoners lithography. Tuesday began with papers at 8am and the last panel ended at 9pm, with for me a lunch meeting and poster session in lieu of dinner thrown in as well. I ran constantly from session to session (trying not miss the most interesting papers), and constantly ran into colleagues I see only once each year (trying to remember their names while not looking down at their badges). I ended the day with a shot of Jameson’s at Original Joe’s, tired but satisfied.

I also had two papers, one oral and one poster. Luckily, I had them both prepared well in advance. (People that know me are laughing out loud right now.) In truth, the stress and adrenaline of just-in-time presenting makes this conference even more exciting, though I swear every year that this year will be the last time I am so disorganized. Now if only I could finish my talk for tomorrow…

I saw many interesting papers of the solid, incremental advancement type – the lifeblood of this conference. I criticized a few of them, mostly for failing to learn the lessons I’ve already learned and repeating the mistakes other authors have already made. Nobody can read and absorb the entire literature and history of an industry, which is why the format of conference presentation is so valuable. The communication and teaching is two-way. You tell the audience what you have done and learned in the hopes of teaching them, and they give you feedback as to how that fits within the community’s vast knowledge base. The bigger and more diverse the audience, the better. But make no mistake, baring your technical soul for inspection is a scary thing, especially for the many young folks presenting here for the first time. I congratulate each author for their mettle – success is in the doing.

My sense of the mood at the conference is one of disappointment with the progress of EUV lithography. Roadmaps are slipping because of source power. Progress in line-edge roughness reduction is almost nonexistent. The major ASML papers on EUV progress are yet to come.

While everyone is excited about directed self-assembly (there are 55 DSA talks this year, compared to 20 last year), there are still many unknowns. I suspect, however, that a first application of DSA is emerging that could jumpstart its transition from lab to fab: contact hole shrinking. After exposing the contact holes to be bigger than we want them, DSA polymers coat the inside of the hole, both shrinking them and healing most of their roughness. A neat trick. While this approach does nothing to improve contact hole pitch, it looks like an important and valuable tool for printing one of the most difficult lithography layers.

My favorite quote of the day: “What does not change in lithography is change.” – Tatsuhiko Higashiki, Toshiba. My favorite new acronym: InStED Lithography (Interference Stimulated Emission Deactivation Lithography) – John Petersen.